View W83L519D_4608854.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

winbond integrated media reader W83L519D
W83L519D the trademarks and intellectual property rights of memory stick belong to sony corporation publication release date: jul. 2002 the trademarks and intellectual property rights of sd belong to sd group revision 1.0 all trademarks and brand names belong to their respective owners 1 W83L519D datasheet revision history pages dates version version on web main contents 1 02/jul. 1.0 1.0 1 st release 2 02/sep. 1.01 1.01 remove gpio function and modify recommend circuit. 3 4 5 6 7 8 please note that all data and specifications are subject to change without notice. all the trademarks of products and companies mentioned in this data sheet belong to their respective owners. life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify winbond for any damages resulting from such improper use or sales.
W83L519D the trademarks and intellectual property rights of memory stick belong to sony corporation publication release date: jul. 2002 the trademarks and intellectual property rights of sd belong to sd group revision 1.0 all trademarks and brand names belong to their respective owners 2 content 1 general description............................................................................................................ ...3 2 functions ...................................................................................................................... ...............4 2.1 g eneral ............................................................................................................................... .........4 2.2 s mart c ard i nterface .................................................................................................................4 2.3 m emory s tick i nterface ..............................................................................................................4 2.4 sd m emory c ard i nterface ........................................................................................................4 2.5 p ackage ............................................................................................................................... .........4 3 pin configuration .............................................................................................................. ......5 4 pin description ................................................................................................................ ..........6 4.1 b us i nterface ............................................................................................................................... 6 4.2 s mart c ard i nterface p ins .........................................................................................................7 4.3 m emory s tick i nterface /sd m emory i nterface p ins ................................................................8 4.4 c rystal and p ower p ins ..............................................................................................................9 5 configuration register ......................................................................................................10 5.1 p lug and p lay c onfiguration ...................................................................................................10 5.2 c ompatible p n p..........................................................................................................................10 5.2.1 extended function register ................................................................................................10 5.2.2 extended functions enable register (efer) .....................................................................11 5.2.3 extended function index register (efir), extended function data register (efdr) ......11 5.3 c onfiguration s equence ..........................................................................................................11 5.3.1 software programming example ..........................................................................................12 5.4 g lobal r egisters ......................................................................................................................12 5.5 l ogical d evice 0 (s mart c ard i nterface )................................................................................14 5.6 l ogical d evice 1 (m emory s tick i nterface ) ............................................................................15 5.7 l ogical d evice 3 (sd m emory i nterface ) ..............................................................................15 5 6 ordering instruction.........................................................................................................17 6 7 how to read the top marking.........................................................................................17 6 8 package drawing and dimensions .................................................................................. 17 9 the W83L519D schematic ....................................................................................................... 18
W83L519D the trademarks and intellectual property rights of memory stick belong to sony corporation publication release date: jul. 2002 the trademarks and intellectual property rights of sd belong to sd group revision 1.0 all trademarks and brand names belong to their respective owners 3 1 general description W83L519D is winbond's innovative solution to a new class of storage devices for ia noetebook, desktop pc and pc system-related products. it incorporates a security application: smart card interface and two most promising compact storage interfaces: memory stick interface, and secure digital memory card interface in it era. to cater boundless it implementation possibilities, w8 3l519d can be co nfigured to interface with host through isa bus. base on the isa interface, one smart card interface port and an optional memory stick/sd memory interface ports are provided. the kind of versatility allows user to design very cost- effective products in a very flexible way. the whole chip of W83L519D operates at voltage level of 3.3 v except smart card interface port's i/o pins and isa bus interface that are at 5 v to be compatible with mainstream smart card implementations. advanced power management feature further optimizes power consumption whether in operation or in power down mode. W83L519D comes as a 48-pin lqfp streamline package. combining with powerful functions, effective power management, and versat ile configurability, this integrated me dia reader offers a perfect approach for design of storage device of it products. the trademarks and intellectual property rights of memory stick belong to sony corporation. information check: http://www.memorystick.org/ the trademarks and intellectual property rights of secure digital belong to sd group. information check: http://www.sdcard.org/
W83L519D the trademarks and intellectual property rights of memory stick belong to sony corporation publication release date: jul. 2002 the trademarks and intellectual property rights of sd belong to sd group revision 1.0 all trademarks and brand names belong to their respective owners 4 2 functions 2.1 general support isa bus programmable configuration settings 48 mhz crystal inputs 2.2 smart card interface iso-7816 compliant pc/sc t=0, t=1 compliant 16-byte transmitter fifo and 16-byte receiver fifo fifo threshold interrupt to optimize system performance programmable transmission clock frequency versatile baud rate configuration uart-like register file structure 2.3 memory stick interface memory stick standard format specifications ver. 1.3 compliant support interrupt polling transmission support fifo threshold interrupt to optimize system performance automatic clock halt to prevent underrun/overrun 16 mhz interface clock 2.4 sd memory card interface sd memory card specifications: part 1 physical layer specification version 1.0 compliant support interrupt po lling transmission support fifo threshold interrupt to leverage system performance 24 mhz interface clock 2.5 package 48-pin lqfp
W83L519D the trademarks and intellectual property rights of memory stick belong to sony corporation publication release date: jul. 2002 the trademarks and intellectual property rights of sd belong to sd group revision 1.0 all trademarks and brand names belong to their respective owners 5 3 pin configuration W83L519D irq a ior # iow # reset # pme # vss d7 d6 d5 d4 d3 d2 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 a en tc dack# drq msled/sdled/sd_wp mspwr#/sdpwr# vss msclk/sdclk ms1/sd1 ms2/sd2 ms3/sd3 ms4/sd4 a9 a8 a7 vdd3v a6 a5 a4 a3 a2 a1 a0 irqb ms5/sd5 xin xout scrst# scio scclk scpsnt scpwr# scled vdd d0 d1 24 23 22 21 20 19 18 17 16 15 14 13 37 38 39 40 41 42 43 44 45 46 47 48
W83L519D the trademarks and intellectual property rights of memory stick belong to sony corporation publication release date: jul. 2002 the trademarks and intellectual property rights of sd belong to sd group revision 1.0 all trademarks and brand names belong to their respective owners 6 4 pin description note: in tp3 - 3.3v ttl level input pin in ts - 5v ttl level schmitt-trigger input pin in tsp3 - 3.3v ttl level schmitt-trigger input pin i/o 12t - 5v ttl level bi-directional pin with 12 ma drive-sink capability i/o 24t - 5v ttl level bi-directional pin with 24 ma drive-sink capability i/o 24tp3 - 3.3v ttl level bi-directional pin with 24 ma drive-sink capability o 2 - 5v output pin with 2 ma drive-sink capability o 12 - 5v output pin with 12 ma drive-sink capability o 24p3 - 3.3v output pin with 24 ma drive-sink capability od 12 - open-drain output pin with 12 ma sink capability 4.1 bus interface symbol pin i/o function reset# 4 in tsp3 active-low system reset signal. iow# 3 in tsp3 isa configuration: active-low signal to enable isa i/o write accesses. ior# 2 in tsp3 isa configuration: active-low signal to enable isa i/o read accesses. irqa 1 o 24p3 isa configuration: interrupt output of smart card interface port. irqb 48 o 24p3 isa configuration: interrupt output of memory stick/sd memory card interface port. a0 47 in tp3 isa configuration: address bit 0. a1 46 in tp3 isa configuration: address bit 1. a2 45 in tp3 isa configuration: address bit 2. a3 44 in tp3 isa configuration: address bit 3. a4 43 in tp3 isa configuration: address bit 4. a5 42 in tp3 isa configuration: address bit 5. a6 41 in tp3 isa configuration: address bit 6. a7 39 in tp3 isa configuration: address bit 7. a8 38 in tp3 isa configuration: address bit 8. a9 37 in tp3 isa configuration: address bit 9.
W83L519D the trademarks and intellectual property rights of memory stick belong to sony corporation publication release date: jul. 2002 the trademarks and intellectual property rights of sd belong to sd group revision 1.0 all trademarks and brand names belong to their respective owners 7 4.1 bus interface (continued.) symbol pin i/o function aen 36 in tp3 isa configuration: active-low i/o address enable signal. it is pulled high in dma accesses. tc 35 in tp3 isa configuration: this pin signals termination of dma accesses. dack# 34 in tp3 isa configuration: dma acknowledge. this active-low signal validates dma accesses. drq 33 o 24p3 isa configuration: dma request signal. d7 7 i/o 12t isa configuration: system data bit 7. d6 8 i/o 12t isa configuration: system data bit 6. d5 9 i/o 12t isa configuration: system data bit 5. d4 10 i/o 12t isa configuration: system data bit 4. d3 11 i/o 12t isa configuration: system data bit 3. d2 12 i/o 12t isa configuration: system data bit 2. d1 13 i/o 24t isa configuration: system data bit 1. d0 14 i/o 24t isa configuration: system data bit 0. pme# 5 od 12 active-low pme event. 4.2 smart card interface pins symbol pin i/o function scled 16 o 24 this pin outputs an oscillating cl ock signal of various frequencies depending on traffic of primary smart card interface. scpwr# 17 o 24 primary smart card interface power control signal. scpsnt 18 in ts primary smart card interface card present detection schmitt- trigger input. scclk 19 o 2 primary smart card interface clock output. scio 20 i/o 12t primary smart card interface data i/o channel. scrst# 21 o 12 primary smart card interface reset output.
W83L519D the trademarks and intellectual property rights of memory stick belong to sony corporation publication release date: jul. 2002 the trademarks and intellectual property rights of sd belong to sd group revision 1.0 all trademarks and brand names belong to their respective owners 8 4.3 memory stick interface/sd memory interface pins symbol pin i/o function msled sdled sd_wp 32 o 24p3 o 24p3 in ts ms/sd select = 0, ms function - this pin outputs an oscillating clock signal of various frequencies depending on traffic of primary memory stick interface; ms/sd select = 1, sd function - this pin outputs an oscillating clock signal of various frequencies depending on traffic of primary sd memory card interface. ms/sd select = 1, sd function ? write protect input signal. mspwr# sdpwr# 31 o 24p3 o 24p3 ms/sd select = 0, ms function - this pin is power control signal for primary memory stick interface; ms/sd select = 1, sd function - this pin is power control signal for primary sd memory card interface. msclk sdclk 29 o 24p3 o 24p3 ms/sd select = 0, ms function - this pin is sclk for primary memory stick interface; ms/sd select = 1, sd function - this pin is clk for primary sd memory card interface. ms1 sd1 28 o 24p3 i/o 24tp3 ms/sd select = 0, ms function - this pin is ms1 for primary memory stick interface; ms/sd select = 1, sd function - this pin is sd1 for primary sd memory card interface. ms2 sd2 27 i/o 24tp3 i/o 24tp3 ms/sd select = 0, ms function - this pin is ms2 for primary memory stick interface; ms/sd select = 1, sd function - this pin is sd2 for primary sd memory card interface. ms3 sd3 26 --- i/o 24tp3 ms/sd select = 0, ms function - this pin is ms3 for primary memory stick interface; ms/sd select = 1, sd function - this pin is sd3 for primary sd memory card interface. ms4 sd4 25 in tsp3 i/o 24tp3 ms/sd select = 0, ms function - this pin is ms4 for primary memory stick interface; ms/sd select = 1, sd function - this pin is sd4 for primary sd memory card interface.
W83L519D the trademarks and intellectual property rights of memory stick belong to sony corporation publication release date: jul. 2002 the trademarks and intellectual property rights of sd belong to sd group revision 1.0 all trademarks and brand names belong to their respective owners 9 4.3 memory stick interface/sd memory interface pins (continued.) symbol pin i/o function ms5 sd5 24 --- i/o 24tp3 ms/sd select = 0, ms function - this pin is ms5 for primary memory stick interface; ms/sd select = 1, sd function - this pin is sd5 for primary sd memory card interface. 4.4 crystal and power pins symbol pin function xout, xin 22, 23 connected to a 48 mhz crystal and function as the working clock for all the media reader interfaces. vdd3v 40 +3.3v power supply for host interface, msi/sdi interfaces, and internal core. vdd 15 +5v power supply for smart card interface i/o pins. vss 6, 30 ground.
W83L519D the trademarks and intellectual property rights of memory stick belong to sony corporation publication release date: jul. 2002 the trademarks and intellectual property rights of sd belong to sd group revision 1.0 all trademarks and brand names belong to their respective owners 10 5 configuration register 5.1 plug and play configuration W83L519D implement compatible pnp protocol to access configuration registers for setting up different types of configurations. there are three logical devices (logical device 0 to logical device 2) in w83l518d/W83L519D which correspond to three major functions: smart card interface (logical device 0), memory stick interface/sd memory interface (logical device 1), gpio (logical device 2). each logical device has its own configuration registers (cr30 and above). host can access those registers by writing an appropriate logical device number into logical device select register at cr7 first. one set per logical device logical device select 07 h 30 h 40 h feh 3f h logical device control global registers logical device configuration 5.2 compatible pnp 5.2.1 extended function register w83l518d/W83L519D provide two methods to enter extended function mode (compatible pnp) and access configuration registers dependent on value of hefras (bit 6 of cr26) as follows: hefras address and value 0 write 83h to i/o address 2eh twice 1 write 83h to i/o address 4eh twice in compatible pnp, a specific value (83h) must be written twice to the extended function enable register (efer at i/o address 2eh or 4eh). secondly, an index value (02h, 07h-ffh) must be written to the extended function index register (efir, i/o address at 2eh or 4eh which is the same as efer) to identify which configuration register is to be accessed. user can then access the addressed configuration register through the extended function data register (efdr, i/o address at 2fh or 4fh).
W83L519D the trademarks and intellectual property rights of memory stick belong to sony corporation publication release date: jul. 2002 the trademarks and intellectual property rights of sd belong to sd group revision 1.0 all trademarks and brand names belong to their respective owners 11 after programming of the configuration register is completed, another specific value (aah) should be written to efer to leave extended function mode to prevent inadvertent accesses to those configuration registers. user may write a "1" to bit 5 of cr26 (lockreg) to prevent configuration registers from accidental accesses. 5.2.2 extended functions enable register (efer) after a power-on reset, w83l518d/W83L519D enters the default operation mode. a specific value must be programmed into the extended function enable register (efer) so that configuration registers can be accessed. on a pc/at system, its i/o address is 2eh or 4eh (as described in previous section). 5.2.3 extended function index register (efir), extended function data register (efdr) after entering extended function mode, extended function index register (efir) must be written with an index value (02h, 07h-feh) to specify which configuration register is to be accessed through extended function data register (efdr). efir is a write-only register at i/o address 2eh or 4eh (as described in section 6.2.1) on a pc/at system and efdr is a read/write register at i/o address 2fh or 4fh. 5.3 configuration sequence to program configuration registers, specific configuration sequence must be followed: (1) write 83h to efer twice to enter extended function mode. (2) select logical device select register by writing 07h to efir. (3) select logical device by writing a value to efdr. (4) select control/configuration regi ster by writing its index to efir. (5) access selected co ntrol/configuration re gister through efdr. (6) repeat step 4 ~ 5 as needed. (7) leave extended function mode by writing aah to efer. step 2 and step 3 are not necessary for accessing global register (index 00h to 2fh).
W83L519D the trademarks and intellectual property rights of memory stick belong to sony corporation publication release date: jul. 2002 the trademarks and intellectual property rights of sd belong to sd group revision 1.0 all trademarks and brand names belong to their respective owners 12 5.3.1 software programming example the following example is written in intel 8086 assembly language. efer and efir are assumed to be at 2eh, and efdr is at 2fh. use 4eh/4fh instead of 2eh/2fh if hefras (bit 6 of cr26) is set. ;----------------------------------------------------------------------------------- ; enter extended function mode, interruptible double-write | ;----------------------------------------------------------------------------------- mov dx, 2eh mov al, 83h out dx, al out dx, al ;----------------------------------------------------------------------------- ; configure logical device 1, configuration register crf0 | ;----------------------------------------------------------------------------- mov dx, 2eh mov al, 07h out dx, al ; point to logical device number reg. mov dx, 2fh mov al, 01h out dx, al ; select logical device 1 ; mov dx, 2eh mov al, f0h out dx, al ; select crf0 mov dx, 2fh mov al, 3ch out dx, al ; update crf0 with value 3ch ;------------------------------------------ ; exit extended func tion mode | ;------------------------------------------ mov dx, 2eh mov al, aah out dx, al 5.4 global registers cr02 (default 00h, write only) bit [7:1]: reserved. bit 0: swrst = 0 normal operation. = 1 software reset. cr07 (default 00h) bit [7:0]: logical device number. cr20 (read only) bit [7:0]: device id number (higher byte). = 71h
W83L519D the trademarks and intellectual property rights of memory stick belong to sony corporation publication release date: jul. 2002 the trademarks and intellectual property rights of sd belong to sd group revision 1.0 all trademarks and brand names belong to their respective owners 13 cr21 (read only) bit [7:0]: device id number (lower byte) = 2xh cr22 (default 80h) bit 7: scpwd = 0 power down smart card interface. = 1 no power down. bit 6: mspwd = 0 power down memory stick interface. = 1 no power down. bit 5: sdpwd = 0 power down sd memory card interface. = 1 no power down. bit [4:0]: reserved. cr23 (default 00h) bit 7: pme_en. power management event enable bit. = 0 pme_l function is disabled. = 1 enable to issue a low pulse on pme_l when a power management event occurs. bit 6: mspme_en. memory stick interface power management event enable bit. = 0 memory stick interface power management event is disabled. = 1 enable memory stick interface power management event to issue a low pulse on pme_l when pme_en is also enabled. bit 5: sdpme_en. sd memory card interface power management event enable bit. = 0 sd memory card interface power management event is disabled. = 1 enable sd memory card interface power management event to issue a low pulse on pme_l when pme_en is also enabled. bit 4: scpme_en. smart card interface power management event enable bit. = 0 smart card interface power management event is disabled. = 1 enable smart card interface power management event to issue a low pulse on pme_l when pme_en is also enabled. bit [3:0]: reserved. cr24 (default 00h) bit 7: reserved. bit 6: mspme_sts. memory stick interface power management event status bit.
W83L519D the trademarks and intellectual property rights of memory stick belong to sony corporation publication release date: jul. 2002 the trademarks and intellectual property rights of sd belong to sd group revision 1.0 all trademarks and brand names belong to their respective owners 14 = 0 no memory stick interface power management event occurs. = 1 memory stick interface power management event occurs. bit 5: sdpme_sts. sd memory card interface power management event status bit. = 0 no sd memory card interface power management event occurs. = 1 sd memory card interface power management event occurs. bit 4: scpme_sts. smart card interface power management event status bit. = 0 no smart card interface power management event occurs. = 1 no smart card interface power management event occurs. bit [3:0]: reserved. cr26 (default 00h) bit 7: reserved bit 6: hefras, extended function register address select. = 0 extended function registers are at 2eh/2fh. = 1 extended function registers are at 4eh/4fh. bit 5: lockreg = 0 enable accesses of configuration registers. = 1 disable accesses of configuration registers. bit [4:0]: reserved 5.5 logical device 0 (s mart card interface) cr30 (default 0x00) bit [7:1]: reserved. bit 0: logical device active bit. = 0 logical device is inactive. = 1 activates the logical device. cr60, cr61 (default 0x00, 0x00) these two registers select smart card base address [0x100:0xfff] on 8-byte boundary. cr70 (default 0x00) bit [7:4]: reserved. bit [3:0]: these bits select irq re source for smart card interface. crf0 (default 0x00) bit [7:1]: reserved. bit 0: scpsnt_pol (smart card present polarity). scpsnt polarity bit. = 0 scpsnt is active high. = 1 scpsnt is active low.
W83L519D the trademarks and intellectual property rights of memory stick belong to sony corporation publication release date: jul. 2002 the trademarks and intellectual property rights of sd belong to sd group revision 1.0 all trademarks and brand names belong to their respective owners 15 5.6 logical device 1 (memory stick interface) cr30 (default 0x00) bit [7:1]: reserved. bit 0: logical device active bit. = 0: logical device is inactive. = 1: activates the logical device. cr60, cr61 (default 0x00, 0x00) these two registers select msi base address [0x100:0xfff] on 8-byte boundary. cr70 (default 0x00) bit [7:4]: reserved. bit [3:0]: these bits se lect irq resource for msi. cr74 (default 0x04) bit [7:4]: reserved. bit [3:0]: these bits sele ct drq resource for msi. 5.7 logical device 3 (sd memory interface) cr30 (default 0x00) bit [7:1]: reserved. bit 0: logical device active bit. = 0 logical device is inactive. = 1 activates the logical device. cr60, cr61 (default 0x00, 0x00) these two registers select sd card interface base address [0x100:0xfff] on 8-byte boundary. cr70 (default 0x00) bit [7:4]: reserved. bit [3:0]: these bits select irq resource for sd interface. cr74 (default 0x00) bit [7:4]: reserved. bit [3:0]: these bits select drq resource for sd interface.
W83L519D the trademarks and intellectual property rights of memory stick belong to sony corporation publication release date: jul. 2002 the trademarks and intellectual property rights of sd belong to sd group revision 1.0 all trademarks and brand names belong to their respective owners 1 6
W83L519D the trademarks and intellectual property rights of memory stick belong to sony corporation publication release date: jul. 2002 the trademarks and intellectual property rights of sd belong to sd group revision 1.0 all trademarks and brand names belong to their respective owners 1 7 6 ordering instruction part no. package remarks W83L519D 48-pin lqfp 7 how to read the top marking 1st line: winbond logo and the smart@io trademark 2nd line: the chip part number. 3rd line: tracking code 114 g bsb 114 : packages made in '01 , week 14 g : assembly house id; o means ose, g means gr, ? bsb : ic revision s mart@ io W83L519D 114gbsb
W83L519D the trademarks and intellectual property rights of memory stick belong to sony corporation publication release date: jul. 2002 the trademarks and intellectual property rights of sd belong to sd group revision 1.0 all trademarks and brand names belong to their respective owners 18 8 package drawing and dimensions package- 48-pin lqfp 1 12 48 h h controlling dimension : millimeters 0.10 0 7 0 0.004 1.00 0.75 0.60 0.45 0.039 0.030 0.024 0.018 9.10 9.00 8.90 0.358 0.354 0.350 0.50 0.20 0.25 1.45 1.40 0.10 0.15 1.35 0.008 0.010 0.057 0.055 0.026 7.10 7.00 6.90 0.280 0.276 0.272 0.004 0.006 0.053 symbol min nom max max nom min dimension in inch dimension in mm a b c d e h d h e l y 0 a a l 1 1 2 e 0.008 0.006 0.15 0.20 7 0.020 0.35 0.65 0.10 0.05 0.002 0.004 0.006 0.15 9.10 9.00 8.90 0.358 0.354 0.350 7.10 7.00 6.90 0.280 0.276 0.272 0.014 37 36 25 24 13
W83L519D the trademarks and intellectual property rights of memory stick belong to sony corporation publication releas e date: jul. 2002 the trademarks and intellectual property rights of sd belong to sd group revision 1.0 all trademarks and brand names belong to their respective owners 19 9 the W83L519D schematic W83L519D schematic circuit 0.2 b 22 monday, june 10, 2002 title size document number rev date: sheet of reset# xout q3 mosfet p mspwctl#/sdpwctl# a3 x1 48mhz 1 2 d3 + c7 1u scpsnt d3 led r16 1k the lc resonance circuit is used to filter base frequency of 3rd overtone crystal. scc8 sd3 3vcc d[7:0] r12 33 1 2 ms3/sd3 a6 c6 0.1u 1 2 a0 c16 10p r18 20k 1 2 scio xout ms2/sd2 scio sc_vcc sd_3vcc sd4 r35 4.7k 1 2 d4 r34 1k 1 2 s2 2 1 3 scc4 l1 2.2uh 1 2 scrst# xin dack# r20 1m inbond winbond electronics corp. a9 q2 npn sc_vcc scpwctl# sdled sd1 d6 aen 3vcc d0 c15 10p sc_vcc scled a8 r15 1k 1 2 drq irqa sd_3vcc d4 led sdclk r14 1m scled msclk/sdclk q1 mosfet p wr_pt sdled sd_3vcc scpwctl# scpsnt irqb soft start to protect mosfet(optional) r11 330 a[9..0] c14 4.7u 1 2 scclk d2 led a5 r17 4.7k u2 48mhz 7 8 14 gnd out vcc r13 10k a1 3vcc sc_vcc sd_3vcc ms4/sd4 soft start to protect mosfet(optional) a7 r7 330 1 2 3vcc scrst# + c5 1u d1 msled/sdled d5 xin sc read/write led sdpwctl# a2 3vcc sd2 sd socket circuit. 5vcc ior# ms5/sd5 j2 sc_socket 1 2 3 4 5 6 7 8 9 10 c1 c2 c3 c4 c5 c6 c7 c8 s1 s2 q4 npn 5vcc r10 330 sc_vcc u1 w83519d 11 10 9 6 8 7 5 4 45 3 2 12 40 42 1 48 47 46 44 43 39 41 13 14 15 16 17 18 19 20 22 23 24 21 25 30 26 27 28 29 34 36 31 32 33 35 38 37 d3 d4 d5 vss1 d6 d7 pme# reset# a2 iow# ior# d2 vdd3v a5 irqa irqb a0 a1 a3 a4 a7 a6 d1 d0 vdd scled scpwrctl# scpsnt scclk scio xout xin msa/sd5 scrst# ms4/sd4 vss2 ms3/sd3 ms2/sd2 ms1/sd1 msclk/sdclk dack# aen mspwctl#/sdpwctl# msled/sdled drq tc a8 a9 rp1 8p4r-4.7k 1 3 5 7 2 4 6 8 ms1/sd1 pme# sc socket circuit. without sd led function d1 led tc scclk sd5 d7 d2 r20 330 1 2 iow# r19 4.7k 1 2 c4 0.1u 1 2 j2 sd_socket 1 2 3 4 5 6 7 8 9 10 11 sd1 sd2 vss1 vdd sdclk vss2 sd3 sd4 sd5 wr_pt wr_pt_vss a4 r5 33 1 2 5vcc r6 4.7k 1 2
W83L519D the trademarks and intellectual property rights of memory stick belong to sony corporation publication releas e date: jul. 2002 the trademarks and intellectual property rights of sd belong to sd group revision 1.0 all trademarks and brand names belong to their respective owners 20 the W83L519D schematic 5vcc ms1 note 5: ms4 scc4 msclk scrst# + c9 1u pin 10 ms2 sd4 sd1 extension connectors 3vcc ms_3vcc scclk there is either function of sd and ms can be used and depeneded on the design. jp1 1 2 3 4 5 6 7 8 9 10 ms5 c8 0.1u 1 2 scio 3vcc msclk scio 3vcc sd2 note 1: the reset# should be connected with a low asserted signal.(active low) sd1 r24 330 3vcc 3vcc msled 2 ms5 j3 ms_socket 1 2 3 4 5 6 7 8 9 10 5 msclk mspwr# scpwr# r26 1k 1 2 c10 0.1u sdclk sd2 ms3 jp2 1 2 3 4 5 6 7 8 9 10 inbond winbond electronics corp. pin 1 10 d5 led mspwctl# (r_jp2) ms read/write led sdled r_jp1,2: 1x10 ; 2.0 mm(pitch) (option:reserved for power-down) ms5 sd1 r1 r 1 2 ms_3vcc ms1 scc4 sd4 note 4: r21 330 1 2 pin 6 ms3 scled memory stick socket (1) circuit. sdclk pin 1 3vcc sdpwr# r2 1m 1 2 r23 4.7k these irq signals (irqa,irqb) can tie to irqx(irq3,4,...) of isa bus or compatible ones. mspwr# winbond recommended reader board scclk sd3 the trade marks and intellectual property rights of memory stick belong to sony corporation. information check: http://www.memorystick.org scrst# note 3: ms1 sd5 r25 200k 1 2 ms2 scpsnt sdpwr# if any of sc or ms/sd function isn't intened to use, signal scpsnt should be tied to a pull-down resitor and ms4/sd4 to a pull-high one. (recommended: 4.7k ohm ) scc8 q6 npn (r_j1) ms4 ms1 W83L519D schematic circuit 0.2 b 22 monday, june 10, 2002 title size document number rev date: sheet of sd3 scpwr# jp3 header 5x2 16 27 38 49 510 note 6: msled ms4 ms2 d6 led note 2: sdled r_j1 : 2x5 ; 2.54 mm(pitch) <> scpsnt ms3 pin 10 scc8 r3 1m 1 2 scled r22 33 1 2 scpsnt r5 1m 1 2 ms_3vcc these dma signals (drq,dack#) can tie to which pair (drq1,dack1#,...) of isa bus or compatible ones.(except 16 bits dma transaction) sd4 sd5 ms4 r4 1m 1 2 msled (r_jp1) pin 1 soft start to protect mosfet(optional) q5 mosfet p
W83L519D the trademarks and intellectual property rights of memory stick belong to sony corporation publication release date: jul. 2002 the trademarks and intellectual property rights of sd belong to sd group revision 1.0 all trademarks and brand names belong to their respective owners 21 headquarters no. 4, creation rd. iii science-based industrial park hsinchu, taiwan tel: 88 6 -35-77006 6 fax: 88 6 -35-789467 www: htt p ://www.winbond.com.tw/ taipei office 9f , no. 480 , ruei g uan g road , neihu district , tai p ei, 114, taiwan tel: 88 6 -2-81777168 fax: 886-2-87153579 winbond electronics (h.k.) ltd. rm. 803, world trade square, tower ii 123 hoi bun rd., kwun tong kowloon, hong kong tel: 852-27516023-7 fax: 852-27552064 winbond electronics (north america) corp. 2727 north first street san jose, california 95134 tel: 1-408-9436666 fax: 1-408-9436668 please note that all data and specifications are subject to change without notice. all the trademarks of products and companies mentioned in this data sheet belong to their respective owners . these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. winbond customers using or selling these product s for use in such applications do so at their own ri sk and agree to fully indemnify winbond for any damages re sulting from such improper use or sale

▲Up To Search▲

Price & Availability of W83L519D

	To Download W83L519D Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .